Samsung to use TSMC 3nm for Nvidia HBM dies, highlighting TSMC's lead

South Korea's Seoul Economic Daily reported today that Samsung Electronics has agreed to adopt Taiwan Semiconductor Manufacturing Company's (TSMC) 3-nanometer process technology to manufacture base dies for Nvidia's next-generation customized high-bandwidth memory (HBM) chips. This news not only demonstrates the depth of cooperation between the two semiconductor giants, but also implies that TSMC's 3-nanometer technology will become a critical hub in the global high-end memory supply chain. As one of the world's largest chipmakers, Samsung's decision to entrust its manufacturing rights to TSMC highlights TSMC's leading position in the advanced node sector while also showing that Samsung's expertise in chip design and packaging will be leveraged to build higher-performance HBM.

High-bandwidth memory (HBM) is a memory technology specifically designed for graphics processing units (GPUs) and high-performance computing (HPC) applications. Compared with traditional GDDR memory, HBM offers higher bandwidth, lower power consumption, and a more compact packaging structure, making it a core component for artificial intelligence (AI) inference, machine learning training, and large-scale data centers. As AI model sizes expand, the demand for memory bandwidth is growing exponentially, making HBM a major focus of competition among GPU manufacturers. As the leader in the global GPU market, Nvidia continues to increase its R&D investment in HBM and has already adopted multi-layer stacked HBM technology in its latest Ampere and Ada Lovelace series.

Samsung Electronics boasts massive production capacity and mature process technology in the chip manufacturing sector. Since 2017, Samsung has achieved breakthroughs in advanced nodes such as 7-nanometer, 5-nanometer, and even 4-nanometer, and commenced mass production of 5-nanometer chips in 2024. Meanwhile, Samsung is also actively advancing the development of its 3-nanometer process, with mass production expected to be completed in 2025. Choosing to outsource the manufacturing of HBM base dies to TSMC may appear superficially to be delegating part of the process work, but in reality, it represents a deep synergy between the two companies in process and design optimization. Samsung's design and packaging capabilities will be combined with TSMC's 3-nanometer process to produce higher-performance, more energy-efficient HBM products, further consolidating its competitiveness in the high-end memory market.

TSMC's 3-nanometer process technology is currently one of the most advanced manufacturing processes in the world. TSMC completed mass production testing for its first batch of 3-nanometer chips at the end of 2023 and began providing mass production services to clients in 2024. Compared to the 5-nanometer process, 3-nanometer technology can increase chip density by approximately 30% and reduce power consumption by about 15%. This gives the 3-nanometer process distinct advantages in fields such as high-bandwidth memory, AI accelerators, and high-performance processors. TSMC not only holds a technological advantage in its deployment of advanced nodes, but also plays a pivotal role in the global chip supply chain. In the face of US-China trade friction and geopolitical risks, TSMC has strengthened supply chain resilience, signing long-term cooperation agreements with multiple clients to ensure a stable supply of critical manufacturing processes.

Nvidia's leading position in the AI and GPU markets has resulted in an increasingly insatiable demand for high-end memory. The company has announced that it will launch a new HBM-based GPU architecture in 2025 and plans to further increase the stacking layers and bandwidth of HBM by 2026. Because the number of high-end memory manufacturers available in the market is limited, Nvidia's choice of the partnership between Samsung and TSMC ensures both advanced manufacturing processes and the utilization of Samsung's expertise in packaging and testing. This move not only meets Nvidia's own technical requirements, but will also deliver more efficient memory solutions to the entire AI hardware ecosystem, further driving breakthroughs in AI computing power.

Overall, Samsung's choice to use TSMC's 3-nanometer process to manufacture Nvidia's HBM base dies marks a renewed integration and upgrading of the global semiconductor industry supply chain. This not only strengthens the cooperation among the three companies in the fields of advanced nodes and high-end memory, but also provides stronger technical support for high-demand markets such as AI, cloud computing, and high-performance computing. In the long run, this cooperation will promote the rapid iteration of semiconductor technology and may secure greater market share and technological leadership for TSMC, Samsung, and Nvidia in the future global competitive landscape.